The present invention relates to a semiconductor device and a manufacturing method thereof, and is suitably available to, for example, a semiconductor device equipped with anti-fuse memory cells.
Non-volatile memory cells have heretofore been known as memory cells equipped in a semiconductor device. As one of such non-volatile memory cells, there is known a non-volatile memory cell which is capable of writing-in only once and to which a fuse is applied. A memory transistor based on a MOS (Metal Oxide Semiconductor) transistor form is applied as a fuse. The present memory cell is referred to as an anti-fuse memory cell. As one of Patent Documents each having disclosed such a semiconductor device, there is known, for example, Patent Document 1.
In the semiconductor device, one memory cell is configured by a memory transistor, a first selection transistor, and a second selection transistor. The memory transistor, the first selection transistor, and the second selection transistor are electrically coupled in series. A word line is electrically coupled to a memory gate electrode of the memory transistor. A bit line is electrically coupled to the second selection transistor.
A write-in operation of information is performed by applying a prescribed voltage from the word line to the memory gate electrode and thereby dielectric-breaking a gate insulating film. On the other hand, a read-out operation of information is performed by detecting a current flowing from the memory gate electrode to the bit line through a breakdown point made to be a resistor by being subjected to dielectric breakdown, the first selection transistor, and the second selection transistor.